akhan3/async-fifo

Asynchronous FIFO for transferring data between two asynchronous clock domains

GitHub repository with 17 stars and 6 forks.

Language: Verilog

Topics: fpga, clock-domain-crossing, fifo

Open provider repository

Latest metric snapshot

2026-06-05: 17 stars and 6 forks.

Similar repositories

  1. 1. vicharak-in/shrike

    Low cost microcontroller + FPGA board for makers , hobbyist and student for endless possibility.

    GitHub repository with 446 stars and 60 forks.

    Trending score: 0.68; stars gained: +4; forks gained: +0.

    Language: Verilog

    Topics: fpga, fpga-board, open-source, opensource-projects, opensource-toolchain, shrike

  2. 2. lnis-uofu/OpenFPGA

    An Open-source FPGA IP Generator

    GitHub repository with 1,109 stars and 200 forks.

    Trending score: 0.32; stars gained: +1; forks gained: +1.

    Language: Verilog

    Topics: fpga, fpga-soc

  3. 3. najaeda/naja

    Netlist API (and more) for EDA flow development

    GitHub repository with 139 stars and 22 forks.

    Trending score: 0.05; stars gained: +0; forks gained: +0.

    Language: Verilog

    Topics: asic, cpp, eda, fpga, netlist, semiconductor

  4. 4. wupd1122/llama2.c-260k-rtl-fpga

    A minimal RTL implementation of llama2.c stories260K forward inference on FPGA

    GitHub repository with 11 stars and 0 forks.

    Trending score: 0.03; stars gained: +0; forks gained: +0.

    Language: Verilog

    Topics: fpga, hardware-accelerator, llama2, llama2-c, llm, rtl

Trending in Verilog

  1. 1. The-OpenROAD-Project/OpenROAD

    OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

    GitHub repository with 2,724 stars and 909 forks.

    Trending score: 0.69; stars gained: +4; forks gained: +0.

    Language: Verilog

  2. 2. vicharak-in/shrike

    Low cost microcontroller + FPGA board for makers , hobbyist and student for endless possibility.

    GitHub repository with 446 stars and 60 forks.

    Trending score: 0.68; stars gained: +4; forks gained: +0.

    Language: Verilog

    Topics: fpga, fpga-board, open-source, opensource-projects, opensource-toolchain, shrike

  3. 3. nova-studios-hw/novagpu-ts1t

    N.E.O.N. Architecture — Open source GPU RTL in Verilog. Token dataflow, hardware ray tracing, frame generation. First silicon target: 28nm.

    GitHub repository with 11 stars and 0 forks.

    Trending score: 0.50; stars gained: +2; forks gained: +0.

    Language: Verilog

  4. 4. StreamCore-jiali/FPGA-AES-GCM

    FPGA AES-GCM IP Core: 32 Gbps @ 250 MHz, APB3 + AXI-Stream, AES-128/192/256, NIST SP 800-38D

    GitHub repository with 7 stars and 3 forks.

    Trending score: 0.50; stars gained: +2; forks gained: +1.

    Language: Verilog

  5. 5. lnis-uofu/OpenFPGA

    An Open-source FPGA IP Generator

    GitHub repository with 1,109 stars and 200 forks.

    Trending score: 0.32; stars gained: +1; forks gained: +1.

    Language: Verilog

    Topics: fpga, fpga-soc

  6. 6. MiSTle-Dev/NanoMig

    Amiga Minimig ported to the Tang Nano 20k FPGA

    GitHub repository with 194 stars and 26 forks.

    Trending score: 0.32; stars gained: +1; forks gained: +0.

    Language: Verilog

Trending topic: fpga

  1. 1. fpgasystems/Coyote

    Framework providing operating system abstractions and a range of shared networking and memory services for common modern heterogeneous platforms.

    GitHub repository with 371 stars and 104 forks.

    Trending score: 1.08; stars gained: +8; forks gained: +1.

    Language: SystemVerilog

    Topics: fpga, rdma, tcp, virtualization, gpu, networking

  2. 2. vicharak-in/shrike

    Low cost microcontroller + FPGA board for makers , hobbyist and student for endless possibility.

    GitHub repository with 446 stars and 60 forks.

    Trending score: 0.68; stars gained: +4; forks gained: +0.

    Language: Verilog

    Topics: fpga, fpga-board, open-source, opensource-projects, opensource-toolchain, shrike

  3. 3. stnolting/neorv32

    🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

    GitHub repository with 2,123 stars and 343 forks.

    Trending score: 0.65; stars gained: +3; forks gained: +1.

    Language: VHDL

    Topics: risc-v, soft-core, vhdl, fpga, soc, microcontroller

  4. 4. verilog-to-routing/vtr-verilog-to-routing

    Verilog to Routing -- Open Source CAD Flow for FPGA Research

    GitHub repository with 1,238 stars and 444 forks.

    Trending score: 0.53; stars gained: +2; forks gained: +1.

    Language: C++

    Topics: vtr, fpga, cad, verilog, placement, routing

  5. 5. whatchamacallem/libhatchet

    libhatchet is a fast compiling lightweight C17/C++20 bespoke alternative to the C++ standard library designed for cross-compilation to resource-constrained targets like DSPs, FPGAs, ASICs or WebAssembly.

    GitHub repository with 15 stars and 0 forks.

    Trending score: 0.50; stars gained: +2; forks gained: +0.

    Language: C++

    Topics: embedded, embedded-systems, cross-compile, google-test, asic, dsp

  6. 6. siliconcompiler/siliconcompiler

    Modular hardware build system

    GitHub repository with 1,164 stars and 127 forks.

    Trending score: 0.49; stars gained: +2; forks gained: -1.

    Language: Python

    Topics: asic, cmos, eda, fpga, hls, make