Obijuan/obijuan.github.io

Latest metric snapshot

2026-06-04: 11 stars and 0 forks.

Similar repositories

1. 1. vicharak-in/shrike

   Low cost microcontroller + FPGA board for makers , hobbyist and student for endless possibility.

   GitHub repository with 444 stars and 60 forks.

   Trending score: 0.79; stars gained: +4; forks gained: +1.

   Language: Verilog

   Topics: fpga, fpga-board, open-source, opensource-projects, opensource-toolchain, shrike

2. 2. The-OpenROAD-Project/OpenROAD

   OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

   GitHub repository with 2,724 stars and 908 forks.

   Trending score: 0.60; stars gained: +3; forks gained: +2.

   Language: Verilog

   Topics: cpp, def, eda, gdsii, lef, opendb-database

3. 3. MrAbhi19/OpenSiliconHub

   Implementation of hardware cores—including encryption, PRNGs, DSP modules, and accelerators—developed in pure Verilog for reference. Each design is validated against official specifications and supported with comprehensive testbenches.

   GitHub repository with 53 stars and 6 forks.

   Trending score: 0.33; stars gained: +1; forks gained: +0.

   Language: Verilog

   Topics: chacha20, dsp, hardware-designs, keystream-generators, opensiliconhub, prngs

4. 4. nova-studios-hw/novagpu-ts1t

   N.E.O.N. Architecture — Open source GPU RTL in Verilog. Token dataflow, hardware ray tracing, frame generation. First silicon target: 28nm.

   GitHub repository with 11 stars and 0 forks.

   Trending score: 0.05; stars gained: +0; forks gained: +0.

   Language: Verilog

5. 5. najaeda/naja

   Netlist API (and more) for EDA flow development

   GitHub repository with 139 stars and 22 forks.

   Trending score: 0.05; stars gained: +0; forks gained: +0.

   Language: Verilog

   Topics: netlist, eda, semiconductor, verilog, asic, fpga

6. 6. wupd1122/llama2.c-260k-rtl-fpga

   A minimal RTL implementation of llama2.c stories260K forward inference on FPGA

   GitHub repository with 11 stars and 0 forks.

   Trending score: 0.03; stars gained: +0; forks gained: +0.

   Language: Verilog

   Topics: fpga, hardware-accelerator, llama2, llama2-c, llm, rtl

Trending in Verilog

1. 1. vicharak-in/shrike

   Low cost microcontroller + FPGA board for makers , hobbyist and student for endless possibility.

   GitHub repository with 444 stars and 60 forks.

   Trending score: 0.79; stars gained: +4; forks gained: +1.

   Language: Verilog

   Topics: fpga, fpga-board, open-source, opensource-projects, opensource-toolchain, shrike

2. 2. The-OpenROAD-Project/OpenROAD

   OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/

   GitHub repository with 2,724 stars and 908 forks.

   Trending score: 0.60; stars gained: +3; forks gained: +2.

   Language: Verilog

   Topics: cpp, def, eda, gdsii, lef, opendb-database

3. 3. MrAbhi19/OpenSiliconHub

   Implementation of hardware cores—including encryption, PRNGs, DSP modules, and accelerators—developed in pure Verilog for reference. Each design is validated against official specifications and supported with comprehensive testbenches.

   GitHub repository with 53 stars and 6 forks.

   Trending score: 0.33; stars gained: +1; forks gained: +0.

   Language: Verilog

   Topics: chacha20, dsp, hardware-designs, keystream-generators, opensiliconhub, prngs

4. 4. nova-studios-hw/novagpu-ts1t

   N.E.O.N. Architecture — Open source GPU RTL in Verilog. Token dataflow, hardware ray tracing, frame generation. First silicon target: 28nm.

   GitHub repository with 11 stars and 0 forks.

   Trending score: 0.05; stars gained: +0; forks gained: +0.

   Language: Verilog

5. 5. najaeda/naja

   Netlist API (and more) for EDA flow development

   GitHub repository with 139 stars and 22 forks.

   Trending score: 0.05; stars gained: +0; forks gained: +0.

   Language: Verilog

   Topics: netlist, eda, semiconductor, verilog, asic, fpga

6. 6. wupd1122/llama2.c-260k-rtl-fpga

   A minimal RTL implementation of llama2.c stories260K forward inference on FPGA

   GitHub repository with 11 stars and 0 forks.

   Trending score: 0.03; stars gained: +0; forks gained: +0.

   Language: Verilog

   Topics: fpga, hardware-accelerator, llama2, llama2-c, llm, rtl