lcapossio/fpgacapZero
fcapz: Open-source, vendor-agnostic full-featured FPGA debug cores. Embedded Logic analyzer, Embedded I/O and Embedded JTAG-AXI
GitHub repository with 71 stars and 5 forks.
Language: Python
Topics: analyzer, axi, fpga, jtag, verilog, vhdl, debug, logic, spi