Miqeo/lightbits_xcvu7p
A reverse engineering effort to bring up the Virtex Ultrascale fpga in the form of a PCIe board. **Currently working on the RAM pinout**
GitHub repository with 6 stars and 0 forks.
Language: Tcl
A reverse engineering effort to bring up the Virtex Ultrascale fpga in the form of a PCIe board. **Currently working on the RAM pinout**
GitHub repository with 6 stars and 0 forks.
Language: Tcl
Trending score 0.08, freshness score 0.69, stars gained +0, forks gained +0.
2026-11-15: 6 stars and 0 forks.