AleksandarLilic/ama-riscv-sim

C++ Instruction Set Simulator for RISC-V RV32IMC & custom packed SIMD ISA with cache and branch predictor models, C/ASM workloads, and Python analysis tools

GitHub repository with 6 stars and 2 forks.

Language: C++

Topics: baremetal, branch-prediction, branch-predictor, cache, custom-isa, dpi-c, emulator, instruction-set-simulator, isa, performance-analysis

Open provider repository

Latest metric snapshot

2026-06-15: 6 stars and 2 forks.

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